1. Field of the Invention
The invention relates to a mesa semiconductor device having a mesa groove and a method of manufacturing the same.
2. Description of the Related Art
A high power mesa diode is conventionally known as one of mesa semiconductor devices. A conventional mesa diode will be described referring to FIGS. 12 to 15. FIGS. 12 and 14 are schematic plan views of a semiconductor wafer where a plurality of conventional mesa diodes is disposed in a matrix. FIG. 13 is a cross-sectional view of FIG. 12 along line X-X, showing a state after dicing along a scribe line DL1. FIG. 15 is a cross-sectional view of FIG. 14 along line Y-Y, showing a state after dicing along a scribe line DL2.
As shown in FIGS. 12 and 13, an N-type semiconductor layer 11 is formed on a front surface of an N+ type semiconductor substrate 10. A P type semiconductor layer 12 is formed on the front surface of the N-type semiconductor layer 11, and a first insulation film 13 is formed on the P type semiconductor layer 12. An anode electrode 14 electrically connected to the P type semiconductor layer 12 is further formed. A cathode electrode 15 is formed on the back surface of the semiconductor substrate 10.
A mesa groove 16 is formed from the front surface of the P type semiconductor layer 12 to the N+ type semiconductor substrate 10. The mesa groove 16 is formed deeper than the N− type semiconductor layer 11, of which the bottom is located in the N+ type semiconductor substrate 10. A second insulation film 37 fills the mesa groove 16 so as to cover the sidewall thereof including the PN junction JC of the N− type semiconductor layer 11 and the P type semiconductor layer 12 which are in contact. The mesa diode is surrounded by this mesa groove 16, forming a mesa structure. The scribe line DL1 of this mesa diode extends along the center of the width of the mesa groove 16.
Furthermore, as other conventional art, in the case where the scribe line DL2 of the mesa diode surrounded by the mesa groove 26 extends surrounding the mesa groove 26 on its outside as shown in FIGS. 14 and 15, a first insulation film 23 is formed on the P type semiconductor layer 12 and a mesa groove 26 is formed in an opening of the first insulation film 23 deeper than the N− type semiconductor layer 11. A second insulation film 47 fills the mesa groove 26 so as to cover the sidewall including the PN junction JC. A mesa semiconductor device is described in Japanese Patent Application Publication No. 2003-347306.
In the conventional arts of FIGS. 12 and 13 described above, however, when the second insulation film 37 is cut along the scribe line DL1 with a dicing blade in dicing, regions 37C of the second insulation film 37 near the front surface of the P type semiconductor layer 12 separate to cause a formation defect of the second insulation film 37. Furthermore, in the conventional arts of FIGS. 14 and 15, when the P type semiconductor layer 12 is cut along the scribe line DL2 on the outside of the mesa groove 26 with a dicing blade, regions 12C of the P type semiconductor layer 12 near its front surface chip or crack. It means that both the conventional arts have a problem of reducing the yield and productivity of the mesa semiconductor device.